Toshiba Corporation today announced the launch of the new TMPM46BF10FG microcontroller as the latest addition to its ARM® Cortex®-M4F-based TX04 series. The microcontroller is designed for secure communications control. Sample shipments start today with mass production scheduled to start in October 2015. Users of secure communications control systems increasingly require mass memory data for firmware generation management, failure analysis and high-precision consecutive data storage, and such high-level security features as tamper detection and information concealment.
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At the same time, they are also seeking to reduce the number of parts on system circuit board parts by using large capacity memory that incorporates multiple memory chips. The new MCU incorporates a 514-KByte SRAM required for secure communications control, four types of security circuits for network communications, and an SLC NAND flash memory controller for memory expansion. In addition, its clock independent watchdog timer operates to a built-in clock separate from the system clock, improving the safety of system function.
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Features include: ARM ® Cortex ®-M4F core, operable up to 120 MHz; Built-in 514-KByte SRAM; Built-in SLC NAND flash memory controller; The MCU incorporates 4- and 8-bit error correction circuit (BCH ECC) to detect and correct errors by hardware. The IC can be connected to SLC NAND flash memory with a capacity ranging from 4Gbit to 1Gbit.
The IC also incorporates an encryption/decryption circuit (AES:FIPS197 standard), Hash function generation circuit (SHA: FIPS180-4 standard), random seed generation circuit (ESG), and a multiple-length arithmetic (MLA) circuit that is used to calculate elliptic curves for asymmetric cipher.
The IC implements a true random number generator (TRNG: SP800-90C standard) through the combination of the random seed generation circuit and Hash-DRGB created by the hash function generation circuit and the software program. This achieves the robust security function that is required in network communications. In addition, encryption/decryption process is mainly processed by hardware, reducing the load on the CPU. The IC has the watchdog timer that operates along with a built-in clock separate from the system clock. Even if the system clock malfunctions, the watchdog timer can detect an error.
source: http://www.powerpulse.net/story.php?storyID=31910
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